Can we program an FPGA? Well, programming an FPGA does not mean programming in C++. Because, hardware is described in a hardware description language. Verilog or VHDL. While there have been many efforts to use c and c++ for hardware design, it usually leads to C/C++ with a synthesizable subset. Because a description in a software language has a software syntax but it describes hardware.
HDL vs software
Now, programmers use a lot of constructs and algorithms that are simply not synthesizable in digital logic. Moreover, the tools translate a multiplier construct in a digital circuit. But the tool has no idea of the performance needs. Performance and area are important. A HDL is specifically designed for hardware types and a subset of the syntax that synthesis tools support. Whenever we need something specific, the designer uses the specific implementation (IP) instead of a general HDL construct. High level synthesis (HLS) is the wet dream of software engineers. We, hardware engineers, know why we have a HDL syntax. FPGA digital cicuit design in C++ does not solve the problem of software programmers’ lack of in depth knowledge of the hardware. Hence, there is much more to it than meets the eye. For example, there is no clock concept in software. There is no massive parallel processing concept in software (a few threads yes but that is not the same). Hardware is by default parallel. And it has the notion of a clock period.
So, finally, no, it doesn’t make SW people successful FPGA designers. We do not program an FPGA, we configure an FPGA with a digital circuit design. That design is in HDL source code. It has a software syntax but it describes hardware.
Quora space : HW accelerators eating AI
Interesting read as well: what is the difference between FPGA, ASIC and PSoC?