Skip to content

What is an FPGA?

FPGA: Field Programmable Gate Array

FPGA explained. Binary logic or digital logic is in our lives for decades. Because, computers have binary logic. But digital design is much broader than a general purpose processor inside your desktop or laptop. TV, video and music were analog and became digital. Above all, ones and zeros. This means all kinds of communication protocols to transport the ones and zeros to your phone. Digital signal processing, analog to digital conversion and digital to analog. Just to say, digital signal processing is everywhere.

Digital design

When people hear digital design, they think of graphic design or web design. Especially recruiters that search for these terms bump into this issue often. Digital VLSI design, digital chip design, digital IC design, FPGA design, ASIC design, they all designate a person capable of designing digital circuitry, hardware. They write HDL code, a hardware description language with a software syntax that describes hardware. So, “If-then” syntax in HDL means a multiplexer. Two inputs and a selector that chooses between one of the inputs. In digital logic design, we talk about gates (boolean logic AND, OR and NOT). All HDL constructs will translate into gates (simplified I know).

Gates and Wires

Furthermore, gates need interconnection. FPGA’s have small logic blocks, inside are a few gates and a fipflop, a “memory” of the output of a logic equation. There is plenty of wires, called routing, available. Reconfiguring the routing is easy. So, a digital design in HDL translates into a combination of these logic blocks and interconnection of these blocks. The FPGA tools translate your HDL code into an interconnected logic design inside the FPGA, just like you would put lego blocks together to build a home, a plane or a car. As a result, in our specific case, it could be a digital design to compress the number of bits of a video signal coming from a camera. A so called video encoder that we design in HDL and verify in real life putting this design into FPGA and see it work.

Interesting as well: What is the difference between FPGA, ASIC and PSoC?

Published inPOST