Software engineers use processors and microcontrollers all day. They write their software and compile it for execution on this target processor. As a topwriter on Quora, I have seen many misunderstandings concerning what an FPGA is and how it is different from a processor.
A processor has an instruction set architecture. DSPs, digital signal processors, are processors with a specific instruction set. This ISA allows fast execution of multiply-accumulates. For filters and Fourier transforms, they need fast hardware execution of specific signal processing math functions. Hence, different instruction sets for different classes of applications. Today, the well known Intel and AMD processors have multi-core and multi-threaded execution. Still, most software runs sequentialy, execution instruction after instruction. There is no guarantee that multiple threads are possible for your application. Above all, the ISA is a given, a constraint you work with. Parallel processing is not the big asset for general purpose CPU’s.
Every core in an AMD Ryzen or Intel core-ix is the same. They all support the same x86 instruction set. However, in your desktop, laptop and tablet (phone), there is also another type of processor, the graphics processing unit. In HD resolution, we need 1920×1080 pixels, about 2 million per frame. Monitors support 60 frames per second. Therefore, 120 million pixels are processed every second. So, a GPU has a high degree of parallelism. A lot of small cores that are capable of doing math operations fast. Those cores are small and support nothing near the ISA of a Ryzen or core ix processor. Still, the GPU shows the massive parallel capabilities of digital chip design. AI researchers use the NVidia CUDA cores for their algorithms, hence there is software support for compiling AI algorithms with the GPU cores as target instruction set. Both AI and video processing share the need for parallel arithmetic operations. Still, using a GPU for anything else than video processing is still about compiling software into sequential execution of a huge number of small cores.
FPGA (software vs hardware)
A Field Programmable Gate Array is a digital circuit that allows you to connect the basic building blocks the FPGA offers together to implement a digital design. There are several vendors out there, Xilinx is well-known. A few years back, Intel bought Altera, so Intel is another vendor. Actel is another one. Every vendor has its own definition of basic building blocks that it is offering. But, the details are not that important. It is important to understand that an FPGA has no instruction set. It is nothing like a processor. You can put a digital circuit design for a processor on an FPGA. But, you can’t compile your software to a target instruction set. So, it is fundamental to not use “programming” for an FPGA. At least I try to consistently use “configuring” an FPGA. In contrast to programming a processor or microcontroller. It is not ideal, since the word “programmable” is part of the FPGA acronym. Furthermore, the engineer configures the target FPGA for a specific design. If the circuit contains a bug, the engineer reconfigures the FPGA with the updated design. Moreover, a totally different design that fits inside the FPGA, is possible as well.
Hardware Description Language (HDL)
Another important factor that creates confusion is the syntax of the description of the digital design. Digital VLSI designers use an HDL. The syntax is similar to software. Hence, the code will have “if then” and “case” statements. However, an “if then” in HDL describes a multiplexer. Nested “if then” describes a priority multiplexer. A “case” statement is a multiplexer as well but without a priority. The concept of HDL is sound, you abstract the underlying hardware, boolean gates and flipflops. EDA tools or vendor tools (in case of FPGA) read this HDL description and translate it into a technology specific implementation. That implementation translates into a configuration file for the FPGA. But, the syntax looks like software but is not software that compiles with a target ISA in mind. The target is the cells that the FPGA offers to the user.
There are most likely hundreds of times more software engineers in the world than hardware engineers. My quest involves the explanation of what an FPGA and an ASIC is. I want to stress the importance of sound hardware design. The confusion between software and HDL causes perception issues. Software engineers truly believe hardware and especially FPGA design is not hard at all. Similar to me, a hardware engineer, writing software, I produce code that compiles. It also produces the intended outcome. But a great software engineer writes cleaner, faster, potentially reusable or extendable code. And I am 100% sure the code is more efficient, uses less resources and is more readable and smaller than mine. It pains me that the world understands that 10x software engineers exist. The population of software engineers is big enough. Digital VLSI design is such a small niche, 10x hardware engineers exist. The definition of his software counterpart is known. The definition of a 10x hardware engineer is largely unknown.
This is my quest.
To inform and amuse explaining ASIC and FPGA design.
25K++: HW accelerators eating AI
Related to this is my hardware view on a software company designing hardware:
Google tensor processing units